DreamTeam/thinkgear

syncpos = 0
synclen = 2

syncval = 0xaa
synced = (syncval == packet[0] == packet[1]) 
assert synced

lenpos = syncpos + synclen
lenlen = 1

paylen = packet[lenpos]
assert paylen < 170  #  note 170 is 0xaa - just coincidentally?

loadpos = lenpos + lenlen
checkpos = loadpos + paylen 

payload = packet[loadpos:checkpos] # slice so payload is a copy.
paycheck = packet[checkpos]

assert paycheck == 0xff & ~( sum(payload) & 0xff )

codons = {
  0x02: ('POOR_SIGNAL', 1),
  0x04: ('ATTENTION', 1),
  0x05: ('MEDITATION', 1),
  0x16: ('BLINK_EVENT', 1),
  0x55: ('EXTENDED_CODE', 1),
  0x80: ('RAW_EEG', 2),
  0x83: ('ASIC_POWER', 24),
  0xaa: ('SYNC', 172) 
}

getdatalen = lambda x, y:y[x][1]
ptr = payload
codelen = 1 # unless extended code, not handled here.
codepos = 0
datalen = 0

def testdatalen(datalen, codetype):
  if datalen > 1:
    assert codetype >= 0x80
  else:
    assert codetype < 0x80

nextpos = 0

while nextpos < paylen:
  codepos = nextpos
  codetype = ptr[codepos]
  assert codetype in codons
  assert codetype != 0x55 # we don't handle extended code bytes.
  datalen = getdatalen(codetype, codons)
  nextpos = codepos + codelen
  datapos = nextpos
  nextpos = datapos + datalen

  if nextpos >= paylen:
    break

  dataval = ptr[datapos:nextpos]

newpos = datapos + datalen

want function to loop, reading buffer, writing packets

initial state, before loop:
 unsynced buffer (contains fractional packet, sync signal, then possibly complete packet/s)
 blank packet

So, discard buffer contents before first sync signal

begin loop
  at beginning of loop, have blank packet and synced buffer position
  write from buffer to packet
  until either
    A) buffer end reached
    B) logical packet content end reached
    C) new sync signal detected (either before or at - or after! - logical packet end)

    What is "logical packet end" ?
    It is max 171 bytes after sync
    (total 173 bytes = 2 sync, 1 len, payload max 169 and 1 checksum byte)
    Precise length should be the data paylen value written by device + 4

  if A) buffer end reached
  then, still in loop, get new buffer, keep writing packet

  if B) "logical packet end" according to device-written "paylen" byte
  then, send packet, start new blank packet

  if C) sync signal detected before "logical packet end"
  then, handle (apparent) dropped packet and/or logic error
  - Code this logic last, just flag dropped packet for now
  Log incomplete packet for analysis separate from "good" data
  and start new blank packet